Intel &ndash Microprocessor and Peripheral Handbook © 1983 (Catlett, VA)

Intel &ndash Microprocessor and Peripheral Handbook © 1983

Local pick-up preferred (please call first) but will ship at the buyer s expenseKingston Books 15 IMG_7605Illustrated Charts Graphs Block Diagrams Package Pin Configuration (with pin number functions) ABSOLUTE MAXIMUM RATINGS A.C.and D.C. CHARACTERISTICS WAVEFORMS (CLOCK READ WRITE HOLD) INSTRUCTION SETS Data and Instruction Formats FUNCTIONAL DESCRIPTION INTERRUPT AND Serial I O SYSTEM INTERFACE BASIC SYSTEM TIMING PROGRAMMING OF THE COMMAND REGISTER READING THE STATUS REGISTER TIMER SECTION MINIMUM SYSTEM CONFIGURATION BASIC INPUT BASIC OUTPUT TRUTH TABLES IAPX 88 FIVE CHIP SYSTEM.Contents by Chapter (in brief)CHAPTER 1 GENERAL INFORMATION Quality Assurance Operations ..1-4CHAPTER 2 MCS- 80 85 MICROPROCESSORS 8080A 8080A-1 8080A-2 8 Bit N-Channels Microprocessor ..2-1CHAPTER 3 iAPX 86 88 186 188 Microprocessor ..3-1CHAPTER 4 iAPX 286 MICROPROCESSORS iAPX 286 10 High Performance Microprocessor with Memory Management and Protection 4-1CHAPTER 5 iAPX 432 MICROMAINFRAME TM iAPX 43201 43202 43203 VLSI Micromainframe System ..5-1CHAPTER 6 8041A 8641A 8741A Universal Peripheral Interface 8-bit microcomputer ..6-1Paperback 1011 pages